Oscillator circuits are generally used for providing a stable-frequency signal and are used, inter alia, in controlled oscillators which are part of a phase locked loop for mobile communication appliances.
FIG. 5 shows a block diagram of such a phase locked loop which is used to generate signals at output frequencies of up to several gigahertz. The phase locked loop shown comprises a voltage controlled oscillator 7 having an actuating input 71 and a signal output 72, at which the output signal at the frequency fVCO can be tapped off. The signal which is output by the voltage controlled oscillator 7 is supplied to a feedback path which contains a frequency divider having an adjustable frequency divider ratio. The frequency of the feedback signal is divided in the frequency divider 8 by the set factor. The frequency-divided signal is then applied to a feedback input 52 of a phase detector 5.
The phase detector 5 contains a reference input 51 which is connected to a reference oscillator 4. It compares the phases of the signals applied to the reference input 51 and to the feedback input 52 and generates an actuating signal therefrom which is supplied to the actuating input of the voltage controlled oscillator 7 via a loop filter 6. The actuating signal is preferably proportional to the difference between the two phases at the inputs 51 and 52 of the phase detector. The actuating signal causes the oscillator to change its output frequency, until the phase difference between the signals applied to the inputs 51 and 52 of the phase detector disappears.
The demands on power consumption and production costs have necessitated new production technologies and the implementation of such phase locked loops as integrated circuits in semiconductor bodies.
Modern phase locked loops are implemented in CMOS technology, for example, with physical dimensions in the submicron range. The intense nonlinear response of the frequency-voltage characteristics of CMOS components and particularly of CMOS varactor diodes means that particular challenges are placed on the implementation of frequency adjustment for voltage controlled oscillators in CMOS technology.
One way of solving the aforementioned problem is to implement a “digitally controllable oscillator” whose output frequency is adjusted not continuously but rather in small discrete-value steps. This also has the additional advantage that it is possible to use smaller digital loop filters within the phase locked loops instead of the large-area analogue loop filters.
For mobile communication systems, the minimum difference between two frequencies is dependent on the communication standard chosen. By way of example, it may be between 100 kHz and 200 kHz. However, it is expedient on account of process variations in production and temperature fluctuations to implement smaller frequency steps so as to compensate for fluctuations in manufacture and external influences. In this case, the smallest frequency step is produced by a switching operation between a maximum and a minimum value for the smallest capacitance value that is to be implemented for the given semiconductor technology.
On account of the small dimensions, small process variations during production have a drastic influence on this capacitance value. In addition, the phase noise increases as the fundamental frequency of an output signal from a voltage controlled oscillator implemented in this manner rises.